note 6

A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word ofmemory.a. How many bits are needed for the opcode?b. How many bits are left for the address part of the instruction?c. What is the maximum allowable size for memory?d. What is the largest unsigned binary number that can be accommodated in one word of memory?

Given the structure of the CPU in the references section provide the control signals that implements the following instruction. SUB r3, r2, r1

Differentiate the Stack, the Data, and the Code segments. Then, you need to figure out which combination of registers was used to address the data objects in each section.

It is possible for the subsequent procedure to be carried out while the CPU is pausing for an interrupt. Is it essential to put off the execution for a while? Why don't we simply go ahead and do the surgery and trust ourselves to figure out the rest?

Can you describe the CPU's function and the operations it performs? What are your feelings and responses to this circumstance?

Assume all of Pep/9's main memory is filled up with unary instructions. How many steps are there in each one? B) If there are no unary instructions, how many instructions can fit in the main memory? An equal number of unary and nonunary instructions are stored in the main memory. What is the total number of instructions?

A computer has a 256K word addressable memory Module with 16 bits per word. The instruction set consists of 166 different instructions. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. Based on the above, answer the following questions: a. How many bits are there in the main memory? (Represent it in power of 2) b. How many bits are needed for the opcode? c. How many bits are left for the address part of the instruction? d. How many additional instructions can be added to the existing 166 without affecting the assigned size of the opcode part? Justify.

Suppose that you have a computer with a memory unit of 24 bits per word. In this computer, the assembly program's instruction set consists of 198 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. a. How many bits are needed for the opcode? b. How many bits are left for the address part of the instruction? c. How many additional instructions could be added to this instruction set without exceeding the assigned number of bits? Discuss and show your calculations.

A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address, similar to Marie). Each instruction is stored in one word of memory. a) How many bits are needed for the opcode? b) How many bits are left for the address part of the instruction? c) What is the maximum allowable size for memory?

The machine instruction cycle is: A Fetch - process - decode. B Fetch execute - process. C Fetch - decode – execute. D Fetch- execuie- decode.

Each instruction in this situation is given its own data, separate from the data used by any other instructions. To do this, we use a: A Multiple Input/Output B Data or Instruction Repeatedly C Distinct Information Difficulty Level: Single Inst, Single Inst, Multiple

In a few words, describe the instruction pointer.

In an instruction cycle the execute phase includes Select one: a.the operation of the decoded instruction on all the operands. b.there is no correct answer here c.incrementing the program counter by 2 addresses. d.the step of decoding the instruction for execution. e.the transfer of the content of memory address pointed by the program counter.

What precisely do we mean by "loop unrolling?"   What role does it play in optimising instruction execution?

The most time - consuming operation in a computer is: O A. Register access O B. The execution phase of a register reference instruction Memory access. O D. The decoding phase of an instruction cycle

a. Response time b. Throughput c. Execution Time 2. The register that hold the address of the current instruction being executed is called a. Saved register b. Global pointer c. Stack pointer used to identify the d. Clock Rate d. Program counter

For the instructions ADD, LDR, and JMP, write the operations that occur in each phase of the instruction cycle.

A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory.1. a) How many bits are needed for the opcode?2. b) How many bits are left for the address part of the instruction?3. ◆c) What is the maximum allowable size for memory?4. d) What is the largest unsigned binary number that can be accommodated in one word of memory?

What exactly do we mean when we say "loop unrolling"? How does it aid in optimising instruction execution?

An instruction is stored at location 100 with its address field at location 101.The address field has value 200. A processor register R1 contains the number 300. Evaluate the effective address if the addressing mode of the instruction is A. Direct B. Immediate C. Relative D. Register Indirect E. Index with R1 as the index Register

Here, each instruction receives its own data independently of how other instructions get theirs. We utilize: A Multiple Data/Instruction B Multiple Data/Instruction C Singular Data Single Inst D Singe Inst Multiple

ca you Include a screenshot of the simulation’s result (A screenshot of the MARIE Simulator window after running the program).   Use “ORG” instruction to start the program at an address equivalent to 130010. Use the number 0 to input the new value of x. Do not forget to change the Input and output boxes to decimal! The following labels and directives should be included at the end of  program: X,      Dec 0 Y,      Dec 2 Z,      Dec 5 One,  Dec 1

A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory.Q.) What is the maximum allowable size for memory?

A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory.Q.) How many bits are left for the address part of the instruction?

Why is it that the CPU normally only interacts with memory?(Recall that input and output normally travel through memory, and the CPU loads and stores data from memory.)

what is the instruction format of the operation below and how the CPU fetch this operands from memory? Explain that. A = X-Y/Z *

Microprocessor assembly code: There are 25 1-band numbers stored in memory starting from 1000H address. Write the program that shows the numbers greater than 50 with LEDs connected to port 2 with 2s intervals Tips: If the numbers are 01-03-55-21-51-34 ...... 66-FF 55-51 -..... 66-FF will be sent to Port 2 at 2s intervals. It should be assumed that the numbers were pre-entered into memory with the C 1000 command.

There are two "backup" instructions for each instruction in a computer instruction set design, which is called orthogonality. Tell us whether this statement is correct or incorrect.

Instruction and data addresses are stored in separate registers, and the CPU uses values to access memory locations. To do this, use the above statement as a guide and list all of the registers that are used in the aforementioned processes.